timing


clock signals



A.

add, logic operation


	(select logic op)


	    +--+
clear	    |  | 
rx	----+  +--------------

	         +--+
set	         |  | 
rx	---------+  +--------

	              +--+
clear	              |  | 
r1	--------------+  +--------

	                   +--+
set	                   |  | 
r1	-------------------+  +--------

	                        +--+
clear	                        |  | 
ipx	------------------------+  +--------

	                             +--+
set	                             |  | 
ipx	-----------------------------+  +--------

	                                  +--+
clear	                                  |  | 
ip	----------------------------------+  +--------

	                                       +--+
set	                                       |  | 
ip	---------------------------------------+  +--------


next instruction





B.

register transfer instruction


	(select dest register)


	    +--+
clear	    |  | 
ra	----+  +--------------

	         +--+
set	         |  | 
ra	---------+  +--------

	                        +--+
clear	                        |  | 
ipx	------------------------+  +--------

	                             +--+
set	                             |  | 
ipx	-----------------------------+  +--------

	                                  +--+
clear	                                  |  | 
ip	----------------------------------+  +--------

	                                       +--+
set	                                       |  | 
ip	---------------------------------------+  +--------
